commit 6d2bfc8228e9b4da317cd4f689a8eb1a82b42e70
parent 79ffaadb5d386bbfb79a5d3251fc32470b2d49c7
Author: root <root@fif>
Date: Wed, 3 Apr 2024 13:10:52 +0000
little dma.
Diffstat:
9 files changed, 82 insertions(+), 12 deletions(-)
diff --git a/build.sh b/build.sh
@@ -1 +1 @@
-c++ -Wall -Wpedantic -static -O3 -Wall -pedantic -g src/*.c -o bin/ultimecia
+c++ -Wall -Wpedantic -static -Wall -pedantic -g src/*.c -o bin/ultimecia
diff --git a/src/cpu.c b/src/cpu.c
@@ -411,13 +411,13 @@ op_cop1(CPU* cpu, instruction* i)
exception(cpu, E_COPROCESSOR_ERROR);
}
-// GTE
+/* GTE */
void
op_cop2(CPU* cpu, instruction* i)
{
fprintf(stderr, "Unhandle GTE Instruction: %08X\n", i->_0);
exit(EXIT_FAILURE);
- //exception(cpu, E_COPROCESSOR_ERROR);
+ /* exception(cpu, E_COPROCESSOR_ERROR); */
}
void
@@ -800,10 +800,10 @@ op_mult(CPU* cpu, instruction* i)
i64 a, b;
u64 v;
- a = i64((i32)reg(cpu, i->s));
- b = i64((i32)reg(cpu, i->t));
+ a = (i64)((i32)reg(cpu, i->s));
+ b = (i64)((i32)reg(cpu, i->t));
- v = u64(a * b);
+ v = (u64)(a * b);
cpu->hi = (u32)(v >> 32);
cpu->lo = (u32)v;
diff --git a/src/cpu.h b/src/cpu.h
@@ -53,7 +53,7 @@ typedef enum {
E_STORE_ADRESS_ERROR = 0x5,
E_COPROCESSOR_ERROR = 0xb,
E_ILLEGAL_INSTRUCTION = 0xa,
- E_OVERFLOW = 0xc,
+ E_OVERFLOW = 0xc
} EXCEPTION;
CPU* new_cpu(Interconnect*);
diff --git a/src/defs.h b/src/defs.h
@@ -2,4 +2,4 @@
#define LOG_ERR(x) fprintf(stderr, (x))
-#define PANIC(...) do { fprintf(stderr, __VA_ARGS__); exit(EXIT_FAILURE); } while(0)
+#define PANIC(...) do { fprintf(stderr, __VA_ARGS__); exit(EXIT_FAILURE); } while(0)
diff --git a/src/interconnect.c b/src/interconnect.c
@@ -13,6 +13,7 @@ new_interconnect(void) {
Interconnect* inter = (Interconnect*)malloc(sizeof(Interconnect));
inter->bios = BIOS_new("roms/scph1001.bin");
inter->ram = RAM_new();
+ inter->dma = DMA_new();
return inter;
}
@@ -125,8 +126,7 @@ INTER_load32(Interconnect* inter, u32 addr)
contains = UTIL_contains(DMA_START, DMA_SIZE, abs_addr, &offset);
if (contains)
{
- printf("DMA read %08X\n", abs_addr);
- return 0;
+ return INTER_dma_reg(inter->dma, offset);
}
contains = UTIL_contains(GPU_START, GPU_SIZE, abs_addr, &offset);
@@ -213,7 +213,7 @@ INTER_store16(Interconnect* inter, u32 addr, u16 val)
contains = UTIL_contains(IRQ_CONTROL_START, IRQ_CONTROL_SIZE, abs_addr, &offset);
if (contains)
{
- printf("IRQ control write %08X\n at address %08X\n", val, offset);
+ printf("IRQ control write %08X at address %08X\n", val, offset);
return;
}
@@ -265,7 +265,7 @@ INTER_store32(Interconnect* inter, u32 addr, u32 val)
contains = UTIL_contains(DMA_START, DMA_SIZE, abs_addr, &offset);
if (contains)
{
- fprintf(stdout, "Ignoring DMA write %08X to address %08X\n", val, offset);
+ INTER_set_dma_reg(inter->dma, offset, val);
return;
}
@@ -308,3 +308,26 @@ INTER_store32(Interconnect* inter, u32 addr, u32 val)
PANIC("Unhandled store32 into abs_address: %08X\n", addr);
}
+
+u32
+INTER_dma_reg(DMA* dma, u32 offset)
+{
+ u32 val;
+
+ switch (offset) {
+ case 0x70: val = DMA_control(dma); break;
+ default: fprintf(stderr, "unhandled DMA access %08X\n", offset); exit(EXIT_FAILURE);
+ }
+
+ return val;
+}
+
+void
+INTER_set_dma_reg(DMA* dma, u32 offset, u32 val)
+{
+ switch(offset)
+ {
+ case 0x70: DMA_set_control(dma, offset, val); break;
+ default: fprintf(stderr, "unhandled DMA write access %08X to address: %08X\n", val, offset); exit(EXIT_FAILURE);
+ }
+}
diff --git a/src/interconnect.h b/src/interconnect.h
@@ -7,6 +7,7 @@
struct Interconnect {
BIOS* bios;
RAM* ram;
+ DMA* dma;
};
typedef struct Interconnect Interconnect;
@@ -18,3 +19,6 @@ u8 INTER_load8(Interconnect*, u32);
void INTER_store32(Interconnect*, u32, u32);
void INTER_store16(Interconnect*, u32, u16);
void INTER_store8(Interconnect*, u32, u8);
+
+u32 INTER_dma_reg(DMA*, u32);
+void INTER_set_dma_reg(DMA*, u32, u32);
diff --git a/src/mem.c b/src/mem.c
@@ -4,6 +4,29 @@
#include "types.h"
#include "util.h"
+
+
+DMA*
+DMA_new()
+{
+ DMA* dma = (DMA*)malloc(sizeof(DMA));
+
+ dma->control = 0x07654321;
+ return dma;
+}
+
+u32
+DMA_control(DMA* dma)
+{
+ return dma->control;
+}
+
+void
+DMA_set_control(DMA* dma, u32 offset, u32 val)
+{
+ dma->control = val;
+}
+
RAM*
RAM_new(void)
{
diff --git a/src/mem.h b/src/mem.h
@@ -14,6 +14,10 @@ struct DMA {
typedef struct DMA DMA;
typedef struct RAM RAM;
+DMA* DMA_new();
+u32 DMA_control(DMA*);
+void DMA_set_control(DMA*, u32, u32);
+
RAM* RAM_new(void);
u8 RAM_load8(RAM*, u32);
u16 RAM_load16(RAM*, u32);
diff --git a/test.c b/test.c
@@ -1,4 +1,6 @@
#include <stdio.h>
+#include <stdint.h>
+#include <stdlib.h>
struct foo {
int pc;
@@ -12,15 +14,29 @@ bar(struct foo *foo1)
foo1->pc == 1;
}
+typedef struct fyk {
+ int val;
+ struct fyk** foo;
+} fyk;
+
int
main()
{
+ fyk f = (fyk){100, NULL};
+ fyk f1 = (fyk){1, &f};
+ fyk* f2 = (fyk*)malloc(sizeof(fyk));
+
+ f2 = {2, &f1};
+
+ printf("Hello there F data %d\n", f2->foo->foo->val);
+
struct foo foo1 = { 1,1 };
printf("%d", foo1.pc);
bar(&foo1);
printf("%d", foo1.pc);
1 ? printf("hello there"), printf("what") : 0;
+
return 0;
}
